Selecting the Optimum Test Tones and Test Equipment for Successful High-Speed ADC Sinewave Testing - AN1819

ثبت نشده
چکیده

An earlier application note, "Coherent Sampling vs. Window Sampling," covered the basics of coherent sampling. It showed differences between tests performed with coherent sampling and windowed sampling conditions. The following technical discussion is a follow-up note, which deals with the proper selection of test tones and instruments to successfully test and evaluate a high-speed ADC's AC performance.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Signature Testing of Analog-to-digital Converters

− When testing an analog-to-digital converter (ADC) by automatic test equipment (ATE), the latter is capable of performing extensive processing of output responses of the ADC. This allows detection of virtually any fault. However, the cost of ATE is quite high. As well, the external bandwidth of ATE is normally lower than the internal bandwidth of the ADC being tested, which makes it difficult ...

متن کامل

ADC characterization for high-speed applications

There is a rapid development of the performance of state-of-the-art analog to digital converters (ADC). Resolution and sampling rate are increasing continuously. Sampling rates in the high intermediate frequency (IF) range with sufficient dynamic range for communication applications were introduced about the turn of the millennium. Post-correction methods enable fast ADCs with modest linearity,...

متن کامل

A Low-Cost Bit-Error-Rate BIST Circuit for High-Speed ADCs Based on Gray Coding

Real-time on-chip measurement of bit error rate (BER) for high-speed analog-to-digital converters (ADCs) does not only require expensive multi-port high-speed data acquisition equipment but also enormous post-processing. This paper proposes a low-cost built-in-self-test (BIST) circuit for high-speed ADC BER test. Conventionally, the calculation of BER requires a high-speed adder. The presented ...

متن کامل

Structural DfT Strategy for High-Speed ADCs

This paper presents a Design-for-Test (DfT) approach for folded ADCs. A sensor DfT circuit is designed to sample several internal ADC test points at the same time, so that, by computing the relative deviation among them the presence of defects can be detected. A fault evaluation is done considering a behavioral model to compare the coverage of the proposed test approach with a functional test. ...

متن کامل

Noise sensitivity of the exponential histogram ADC test

This paper deals with some error effects caused by additive noise at analogue-to-digital converters (ADCs) testing based on the histogram method and the exponential shape of input testing stimulus. The histogram method with the exponential stimulus has been an alternative test method for ADC that was developed by the authors of this paper. Here, the theoretical analysis of some errors in estima...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2002